Field of the Invention
The present invention relates to a through electrode used in a three-dimensional integrated circuit and a manufacturing method thereof, and a semiconductor device and a manufacturing method thereof.
Background Art
Along with demands for more compact portable and wireless electronic devices, the development of finer and denser integrated circuits has been promoted to be used for micro-electronics in the next-generation. As a method to connect electronic devices mutually, three-dimensional packaging technology currently attracts attention. A through electrode, such as a through-silicon via (TSV), is one of the techniques to implement three-dimensional packaging, which is used to electrically connect devices that are three-dimensionally stacked, such as a logic, a memory, a sensor and an actuator.
Copper is a promising material for a conductive layer to make up a through electrode because of its low electric resistivity and high stress migration resistance. Meanwhile the use of a silicon oxide film as a side-wall insulating film has been examined so as to coat the side of a conductive layer of a through electrode (see Non-Patent Document 1, for example).